About Me

I am a PhD student at the Budapest University of Technology and Economics, where I research Computer Science. I primarily do research on the formal verification of multi-threaded software running on weakly consistent multi-core architectures. Furthermore, I am familiar with the toolset of SysML and SysML v2, which I actively use as part of my employment as a research assistant.

My PhD advisor is Dr. Vince Molnár.

Education

2022 - present: Budapest University of Technology and Economics
Computer science PhD, advised by Dr. Vince Molnár
2021 - 2022: Budapest University of Technology and Economics
Computer Engineering MSc thesis
2017 - 2021: Budapest University of Technology and Economics
Computer Engineering BSc thesis

Certifications

2021: Systems Modeling Professional, Model User OMG-OCSMP
Demonstrating the ability to interpret and understand basic MBSE concepts along with SysML models.

Employment

2021 - present: Center for University-Industry Cooperation, BME, Budapest, Hungary, Research Assistant
Adapting novel concepts of systems engineering (including SysMLv2) to industrial processes.
2020 - 2021: thyssenkrupp Components Technology Hungary, Budapest, Hungary, IoT Consultant
Providing feedback to IoT system developers (related to communication, networking and system design).
2019 - present: Department of Measurement and Information Systems, BME, Budapest, Hungary, Teaching Assistant
Delivering practical lectures, correcting and assembling exams, managing homework IT infrastructure.

Internships

2020 - 2021: thyssenkrupp Components Technology Hungary, Budapest, Hungary, Software Engineering & Research Intern
Researching the applicability of multi-core architectures to existing implementations of automotive software.

Volunteering

2015 - 2021: Skool, Budapest, Hungary, Mentor & Programming Tutor
Helping underrepresented students start their journey with programming.

Tools

2016 - present: Theta
Generic, modular and configurable model checking framework.

Service

Reviewer (journal): SCP
PC member: TACAS’24 (SV-COMP), TACAS’23 (SV-COMP), FormaliSE’23, CSAE’23
Subreviewer: ISSRE-W’22, VMCAI’23, SBMF’23
Artifact Evaluation: TACAS’24 (SV-COMP), TACAS’23 (SV-COMP), TACAS’23 (SV-COMP), CAV’22, CAV’23, FormaliSE’24, ESOP/FASE/FoSSaCS’24